This application is based upon and claims priority of Japanese Patent Application No. 2002-190800, filed on Jun. 28, 2002, the contents being incorporated herein by reference.
(1) Field of the Invention
This invention relates to a semiconductor device and, more particularly, to a semiconductor device having a macro cell including a plurality of macro cells and a fuse, and a fuse.
(2) Description of the Related Art
For example, with semiconductor devices, such as memories, the following method has been adopted. A cell array is divided into a plurality of blocks. If one block does not work well, another block is used in place of this block. By adopting this method, yields can be raised.
FIG. 14 is a view showing an example of this conventional method.
In FIG. 14, a semiconductor device 10 comprises macro cells 10a through 10d, fuses 10e through 10h, and connection lines 10i through 10l. 
The macro cell 10a includes, for example, a cell array divided into a plurality of blocks. One of the blocks is a redundant block and the rest are normal blocks.
All of the fuses 10e through 10h have the same structure. Description will be given with the fuse 10e as an example. As shown in FIG. 15, the fuse 10e includes a pull-up resistor 20, a connection section 21, a fuse element group 22, and a decoder 23. If a predetermined normal block included in the macro cell 10a does not work well, the normal block to be replaced is specified by fusing a fuse element included in the fuse element group 22 into a predetermined pattern by the use of a laser beam.
Now, operation performed in the above conventional method will be described. Description will be given on the assumption that each of the macro cells 10a through 10d includes ten normal blocks and one redundant block.
It is assumed that a first normal block in the macro cell 10a does not work well, that a third normal block in the macro cell 10c does not work well, and that the remaining macro cells 10b and 10d are normal.
Then a fuse in the fuse 10e corresponding to the first normal block in the macro cell 10a is fused by the use of a laser beam and a fuse in the fuse 10g corresponding to the third normal block in the macro cell 10c is fused by the use of a laser beam.
As a result, in the fuse 10e output from the fuse fused goes into the xe2x80x9cLxe2x80x9d state and output from the other fuses goes into the xe2x80x9cHxe2x80x9d state. The decoder 23 decodes these signals output from the fuse element group 22 and supplies them to the macro cell 10a. 
In the macro cell 10a, the first normal block is replaced with a redundant block in response to a signal supplied from the decoder 23 in the fuse 10e. As a result, the first normal block is excepted and the redundant block is used instead. The macro cell 10a therefore can operate normally.
The same operation will be performed in the fuse 10g and macro cell 10c, so that the third normal block is replaced with a redundant block. The macro cell 10c therefore can operate normally.
The macro cells 10b and 10d are normal, so replacement will not be made.
By the way, in recent years the process for fabricating semiconductor devices has become minuter, so the size of the macro cells 10a through 10d tends to reduce. On the other hand, individual fuses in the fuses 10e through 10h must be located at moderate intervals because they must be fused selectively by the use of a laser beam. Therefore, though the size of the macro cells 10a through 10d is reduced by adopting a minute process, the size of the fuses 10e through 10h is not reduced. This is a bottleneck in reducing the entire size of the semiconductor device.
The present invention was made under the background circumstances as described above. An object of the present invention is to make it possible to reduce the size of a semiconductor device having a plurality of macro blocks and a fuse.
In order to achieve the above object, a semiconductor device comprising a plurality of macro cells each including a plurality of normal blocks each including circuits each having a predetermined function and a redundant block having the same function as the normal blocks have and used, in the case of one of the normal blocks not working well, in place of the normal block and a fuse shared by the plurality of macro cells for holding information for specifying the normal block to be replaced with the redundant block included in the macro cell is provided.
The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.